Speakers
Description
The aim of this project is to develop a controller to run the High Voltage Generator (HVG) for the 2MV Tandetron accelerator (Small Tandem Accelerator for Research (STAR)) at ANSTO.
The HVG is a solid state voltage multiplier used instead of a belt or pellet chain to generate the high potential for the accelerator terminal.
The current HVG controller PCB is damaged and is running in a static, fixed frequency mode. The current controller is constructed of obsolete components that have no direct replacements. The repair of this PCB in not a feasible option.
The new control hardware is based on a NI cRIO-9035 PLC using a NI9401 (Ultra-fast digital output), NI9403 (Digital Input/Output) and a NI9205 (Analogue Input). We are using LabVIEW 2019 for the software development environment.
This PLC consists of a FPGA and a Real Time unit within an ARM based processor. The accelerator controller is in charge of tracking the resonant frequency of the accelerator. This is achieved within the FPGA section by implementing a phase-locked loop (PLL). The output stage IGBTs are controlled also by the FPGA using PWM in real parallel execution. Moreover, the interlock system will be developed in Real Time controller.
The implemented wideband PLL will maximise power delivery efficiency to the HVG. The PLL free-running VCO is able to tune from 35 kHz to 47 kHz (25%) with a lock in range of 40.7 to 41.3 kHz. This enables the controller to precisely track the drift in the resonant frequency of the HVG.
The controller can also precisely vary the width of the pulse (PWM) from 1% to 99% (operational range from 5 – 30 %) with the resolution of 1% at the entire frequency band. This will enable the accelerator to run at different voltages terminals.
Experimental results shows that our new HVG control system not only runs the accelerator efficiently and safely, but also provides remote monitoring and upgradability.
